About AVRILOS
A simple Embedded System Framework that allows rapid development of applications build for AVR family. System is based on a super-loop architecture with check and skip (no-wait) flag event driver system. Supports: UART,...
A simple Embedded System Framework that allows rapid development of applications build for AVR family. System is based on a super-loop architecture with check and skip (no-wait) flag event driver system.
Supports:
UART, SysTick Timer, ADC, SPI, EEPROM, PWM.
Also supports: Xilinx FPGA configuration, FPGA SSI interface, smart card reader etc.
Tested partially (different modules in each case) on ATMega163/16/32/323/8.
Awards
CodeProject 2010, Third Prize, Hardware and Device Programming
Check the Wiki Page for more details.
Features
- 8-channel AVR controlled R/C Servo Control
- Smart Card Reader
Previous Versions
Here you can find the changelog of AVRILOS since it was posted on our website on 2015-04-24 03:00:00.
The latest version is and it was updated on 2024-03-19 19:30:26. See below the changes in each version.
AVRILOS version
Updated At: 2012-01-22
AVRILOS version Release_01
Updated At: 2011-05-28
Changes: Several fixes and updates
Disclaimer
External Download
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